Last updated: 26 September 2026
Short answer: yield is the percentage of chips on a silicon wafer that come out working. TSMC's 2nm wafers reportedly cost around $30,000 each, so every chip that fails pushes up the cost of the ones that pass. Higher yield means cheaper good chips and more of them, which is why yield decides which products get 2nm first and how much extra you pay for them. A single yield figure means little on its own, though, because a big chip always yields worse than a small one on the same wafer.
What does "yield" actually measure?
A 300 mm wafer is processed as one piece, then cut into hundreds of individual chips, called dies. Each die is tested. The ones that work are sold; the ones that don't are scrapped. Yield is simply good dies divided by total dies.
Anyone who has worked in manufacturing already knows this idea as first-pass yield or scrap rate. The difference in chipmaking is the scale of the fixed cost. You cannot rework a bad die. Once a tiny defect lands in the wrong place during one of hundreds of process steps, that die is gone, and the full cost of the wafer is shared by whatever survived.
Defects are close to random, so engineers usually model them with a simple equation: the chance that a die has zero defects falls exponentially as the die gets larger or the defect density rises. That one relationship explains almost everything in this article.
Why does yield decide the price of a chip?
Because the wafer costs the same whether 90 percent of its dies work or 40 percent do. Here is a worked example using the standard approximations for dies per wafer and a random-defect yield model. The $30,000 wafer price is the figure reported for TSMC's 2nm process in October 2025; TSMC does not publish its prices.
- A 100 mm² die, roughly the size class of a phone processor, fits about 640 times on a 300 mm wafer once you allow for the edges.
- A 300 mm² die, closer to a large laptop or graphics chip, fits about 197 times.
Now vary the defect density (defects per square centimetre):
| Defect density | Yield, 100 mm² die | Cost per good die | Yield, 300 mm² die | Cost per good die |
|---|---|---|---|---|
| 0.1 per cm² | 90% | about $52 | 74% | about $205 |
| 0.3 per cm² | 74% | about $63 | 41% | about $375 |
| 0.5 per cm² | 61% | about $77 | 22% | about $680 |
These are my own illustrative calculations, not TSMC data. They ignore test, packaging and design costs, which add a lot on top.
Two things jump out. First, on the same wafer at the same defect density, the big chip yields far worse than the small one. Second, the big chip's cost is much more sensitive to defects: going from 0.1 to 0.5 raises the small die's cost by about half, but more than triples the large die's.
Is a "70% yield" headline good or bad?
It depends entirely on what chip was measured, and headlines almost never say. A 70 percent yield on a small test chip and 70 percent on a huge accelerator describe very different processes. The most useful single number is defect density, and that is rarely published.
What has been reported for 2nm so far:
- December 2024: trial production yields reportedly passed 60 percent.
- Late 2025: TSMC began volume production of its N2 process in the fourth quarter, at Fab 22 in Kaohsiung.
- 2026: reports put initial volume yields around 70 percent, with the enhanced N2P version due in the second half of the year.
All of these come from industry sources rather than TSMC, so I treat them as direction of travel rather than exact figures. The direction is clearly good: TSMC's official 2nm page describes N2 as its first node with nanosheet transistors, and the process is now shipping in consumer products.
Which products get 2nm chips first?
The ones that can absorb the cost, and whose chips are small enough to yield well early. That points straight at phone processors and premium laptops.
The first high-profile product is Apple's A20 Pro. Apple announced it on 9 September 2026 in the iPhone 18 Pro and iPhone 18 Pro Max, its first iPhone chip on TSMC's 2nm process. Earlier reports said Apple chose the base N2 process rather than N2P for its 2026 chips, trading a small performance gain for lower cost and more secure supply.
Other companies have announced 2nm designs too. MediaTek said in September 2025 that it had taped out its first 2nm flagship phone chip, with mass production planned for late 2026, and AMD said in April 2025 that the core chiplet of its "Venice" EPYC server processor had taped out on N2.
Notice the pattern in AMD's case: a chiplet, not one giant die. Splitting a large design into smaller dies is partly a yield strategy, exactly because of the table above. Chiplets then have to be joined in advanced packaging, which has become a bottleneck of its own; I covered that in semiconductor supply chain 2026.
Will 2nm make my next phone or laptop more expensive?
Probably somewhat, but the chip is only part of the story. The reported $30,000 wafer price is about 10 to 20 percent above TSMC's 3nm wafers, which were reported at $25,000 to $27,000 depending on the variant. On a small phone chip that difference is tens of dollars, not hundreds.
The iPhone 18 Pro did launch at $1,199, $100 more than the iPhone 17 Pro. It is tempting to blame 2nm, but that increase arrived during a wider run of price rises across Apple's product lines in 2026 while memory prices were climbing sharply. Nobody outside Apple can split that $100 between the new chip, the memory, and everything else.
What 2nm does change is value per dollar. TSMC quotes N2 at 10 to 15 percent more speed at the same power than its 3nm N3E process, or 25 to 30 percent less power at the same speed. For a phone, the power saving matters more than the speed, because it shows up as battery life and less throttling.
Why would a company stay on an older node?
Because yield and cost favour mature processes for chips that do not need the latest one. Many parts of a device, such as power management, radio and display drivers, run perfectly well on older, cheaper nodes with very high yields. Even a flagship phone contains far more mature-node chips than leading-edge ones.
If you want to see how chip designers test their designs before committing to a full 2nm production run, I explained TSMC's shared prototyping service in TSMC's 2nm CyberShuttle Explained. And for what happens when a phone design pushes the physics in a different direction, see iPhone 17 Air: what a record-thin phone gives up.
What should I take away as a buyer?
- A new node usually arrives first in expensive, small-chip products. Mid-range devices follow a year or two later, once yields rise and wafers get cheaper.
- A yield percentage without a die size is close to meaningless. Watch for reports that name the chip.
- The chip is rarely the main reason a device's price changes. Memory, displays and batteries often move the total more.
- The real benefit of 2nm for most people is efficiency: longer battery life at the same performance.
FAQ
Is 2nm really 2 nanometres?
No. "2nm" is a marketing name for a process generation, not the size of any single feature on the chip. It signals a denser, more efficient process than 3nm, not a literal measurement.
Does a higher yield mean the chips are better quality?
Not directly. Yield measures how many dies pass testing, not how good the passing ones are. Chips that pass can still be sorted by speed or power, which is why one wafer can produce several product tiers.
Why doesn't TSMC publish its yield figures?
Yield and defect density are commercially sensitive. They reveal how mature a process is and affect pricing negotiations with customers, so most figures you see come from industry sources and analysts.
When will 2nm chips reach mid-range phones?
Usually after the process matures and the next node takes over the top end. Given that 2nm arrived in flagship phones in September 2026, a reasonable expectation is a year or more before it reaches mid-range models, but that is an estimate, not an announced plan.
